Copper has been used extensively in the electronics industry. Indeed, copper has been replacing aluminum as the basic metallization for integrated circuits (ICs). Copper provides a higher electroconductivity as compared, for example, with aluminum. Copper also has a higher resistance to electro-migration than aluminum, making copper a desirable replacement for aluminum. The higher electrical conductivity reduces resistive losses and provides for faster switching needed for advanced ICs.
A well established process for fabricating copper circuitry on semiconductor chips is the so-called Damascene process. Under this process, vias are etched through and trenches are etched in the chip's dielectric material (typically silicon dioxide) although materials with lower dielectric constants are desirable. A barrier layer such as titanium nitride (TiN) or tantalum nitride (TaN), is then deposited into the trenches and vias by reactive sputtering to prevent Cu migration into the dielectric material and degradation of the device performance. A thin sputtered copper seed layer is next deposited to facilitate copper electrodeposition. Copper is then electrodeposited into the trenches and vias. Copper deposited on the outer surface, i.e., outside of the trenches and vias, is removed by chemical mechanical polishing (CMP). The “dual Damascene” process involves deposition in both trenches and vias at the same time.
Integrated circuits (ICs) typically include metal wirings connecting different regions of the circuit. The metal wirings are insulated by a dielectric material in order to prevent capacitance coupling, leakage or cross-talk between the electrical pathways. Metal wirings forming the interlevel connection are commonly referred to as interconnects and are formed by depositing a metal in an opening such as a via, a hole or a trench. The metallic interconnect is typically deposited using damascene or a dual damascene technique.
In depositing the metallic interconnect, a diffusion barrier is formed on the sidewalls of the dielectric layer in the via before depositing the metal interconnect. The barrier layers prevent the metal from corrosion. The barrier layers also prevent migration of metal ions into the dielectric layer.
Another concern in depositing the metallic interconnect is the purity of the metallic interconnect. As the width of vias and trenches shrink, voids occur in the interconnect. Voids can form within vias during metal deposition and cause reliability issues. Purity in the interconnect ensures reliability and high performance. Copper is commonly deposited by electroless or electroplating techniques that typically include a solution containing sulfate and chloride ions. Small amounts of these ions are frequently trapped inside the deposited copper layer and the resulting S and Cl impurity can lead to corrosion and reduced performance. Therefore, a copper deposition method is needed to minimize interconnect impurities.